Since the beginning of the multicore era, parallel processing has become prevalent across the board. However, in order to continue a performance increase according to Moore’s Law, a next step needs to be taken: away from common multicores towards innovative many-core architectures. Such systems, equipped with a significant higher amount of cores per chip than multicores, pose challenges in both hardware and software design. On the hardware side, complex on-chip networks, scratchpads, hybrid memory cubes, non-volatile memory and stacked memory, as well as deep cache-hierarchies and novel cache-coherence strategies will enrich the current research areas in the future.
However, the ROME workshop focuses on the software side because without complying system software, runtime and operating system support, all these new hardware facilities cannot be exploited. Hence, the new challenges in hardware/software co-design are to step beyond traditional approaches and to wage new programming models and operating system designs in order to exploit the theoretically available performance of future hardware as effectively and power-aware as possible.
The focus of the ROME workshop stands in the tradition of a successful series of events originally hosted by the Many-core Applications Research Community (MARC). Prior MARC Symposia took place at ONERA research center in Toulouse, at the Hasso Plattner Institute in Potsdam and at the RWTH Aachen University. In 2013, the organizers continued this series by organizing the 1st ROME workshop at the Euro-Par 2013 in Aachen as a thematically related follow-up event for a broader audience. Last year, this tradition has again been pursued by holding the 2nd ROME workshop in conjunction with the Euro-Par 2014 conference in Porto, Portugal.
This year, too, authors from all related disciplines are invited to submit unpublished papers regarding software for novel many-core hardware architectures. The call for papers especially emphasizes on the challenges and research questions arising from the upcoming generation of heterogeneous and/or massive parallel systems stepping towards a many-core dominated exascale era. The topics of interest include, but are not limited to:
The workshop is scheduled on Tuesday, August 25, 2015, in room EI 4 as half-day workshop.
Session 1 (Chair: Stefan Lankes)
Session 2 (Chair: Jens Breitbart)
Workshop papers must not exceed twelve single-spaced, single-column pages (LNCS style). On acceptance of the submission, at least one author is required to register for workshop attendance at Euro-Par 2015 and present the paper in the workshop session.
Upload your submission to our submission server in PDF format. It must not be simultaneously submitted to the main conference or any other publication outlet.
For the workshop, we will prepare hand-outs with the accepted papers. The revised versions will be published after the conference in the workshop proceedings of Euro-Par 2015, part of the LNCS series of Springer.